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Impact of processing parameters on leakage current and defect behavior of n+p silicon junction diodes

dc.contributor.authorGramenova, Emilia
dc.contributor.authorJansen, Philippe
dc.contributor.authorSimoen, Eddy
dc.contributor.authorVanhellemont, Jan
dc.contributor.authorDupas, Luc
dc.contributor.authorDeferm, Ludo
dc.date.accessioned2021-09-30T08:20:02Z
dc.date.available2021-09-30T08:20:02Z
dc.date.issued1997
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/1899
dc.sourceIIOimport
dc.titleImpact of processing parameters on leakage current and defect behavior of n+p silicon junction diodes
dc.typeProceedings paper
dc.contributor.imecauthorSimoen, Eddy
dc.contributor.imecauthorDupas, Luc
dc.contributor.imecauthorDeferm, Ludo
dc.contributor.orcidimecSimoen, Eddy::0000-0002-5218-4046
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.beginpage228
dc.source.endpage239
dc.source.conferenceCrystalline Defects and Contamination Control: Their Impact and Control in Device Manufacturing II
dc.source.conferencedate31/08/1997
dc.source.conferencelocationParis France
imec.availabilityPublished - open access
imec.internalnotesECS Proceedings; Vol. 97-22


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