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Interface and border traps in Ge pMOSFETs

dc.contributor.authorFleetwood, Daniel
dc.contributor.authorSimoen, Eddy
dc.contributor.authorFrancis, Sarah
dc.contributor.authorZhang, C.X.
dc.contributor.authorArora, R.
dc.contributor.authorZhang, E.X.
dc.contributor.authorSchrimpf, Ronald
dc.contributor.authorGalloway, Ken
dc.contributor.authorMitard, Jerome
dc.contributor.authorClaeys, Cor
dc.date.accessioned2021-10-20T11:01:31Z
dc.date.available2021-10-20T11:01:31Z
dc.date.issued2012
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/20682
dc.sourceIIOimport
dc.titleInterface and border traps in Ge pMOSFETs
dc.typeMeeting abstract
dc.contributor.imecauthorSimoen, Eddy
dc.contributor.imecauthorMitard, Jerome
dc.contributor.orcidimecSimoen, Eddy::0000-0002-5218-4046
dc.contributor.orcidimecMitard, Jerome::0000-0002-7422-079X
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage2637
dc.source.conferenceECS Fall Meeting Symposium E6: High Purity Silicon 12
dc.source.conferencedate7/10/2012
dc.source.conferencelocationHonolulu, HI USA
imec.availabilityPublished - open access
imec.internalnotesECS Meeting Abstracts; Vol. MA2012-02


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