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dc.contributor.authorBreuil, Laurent
dc.contributor.authorLisoni, Judit
dc.contributor.authorBlomme, Pieter
dc.contributor.authorVan den Bosch, Geert
dc.contributor.authorVan Houdt, Jan
dc.date.accessioned2021-10-21T06:50:22Z
dc.date.available2021-10-21T06:50:22Z
dc.date.issued2013-05
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/22082
dc.sourceIIOimport
dc.titleA novel multilayer inter-gate dielectric enabling up To 18V program / erase window for planar NAND flash
dc.typeProceedings paper
dc.contributor.imecauthorBreuil, Laurent
dc.contributor.imecauthorBlomme, Pieter
dc.contributor.imecauthorVan den Bosch, Geert
dc.contributor.imecauthorVan Houdt, Jan
dc.contributor.orcidimecBreuil, Laurent::0000-0003-2869-1651
dc.contributor.orcidimecVan den Bosch, Geert::0000-0001-9971-6954
dc.contributor.orcidimecVan Houdt, Jan::0000-0003-1381-6925
dc.source.peerreviewyes
dc.source.beginpage68
dc.source.endpage71
dc.source.conference5th IEEE International Memory Workshop - IMW
dc.source.conferencedate26/05/2013
dc.source.conferencelocationMonterey, CA USA
imec.availabilityPublished - imec


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