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dc.contributor.authorGroeseneken, Guido
dc.contributor.authorAoulaiche, Marc
dc.contributor.authorCho, Moon Ju
dc.contributor.authorFranco, Jacopo
dc.contributor.authorKaczer, Ben
dc.contributor.authorKauerauf, Thomas
dc.contributor.authorMitard, Jerome
dc.contributor.authorRagnarsson, Lars-Ake
dc.contributor.authorRoussel, Philippe
dc.contributor.authorToledano Luque, Maria
dc.date.accessioned2021-10-21T08:00:41Z
dc.date.available2021-10-21T08:00:41Z
dc.date.issued2013
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/22431
dc.sourceIIOimport
dc.titleBias-temperature instability of Si and Si(Ge)-channel sub-1nm EOT p-MOS devices: challenges and solutions
dc.typeProceedings paper
dc.contributor.imecauthorGroeseneken, Guido
dc.contributor.imecauthorFranco, Jacopo
dc.contributor.imecauthorKaczer, Ben
dc.contributor.imecauthorMitard, Jerome
dc.contributor.imecauthorRagnarsson, Lars-Ake
dc.contributor.imecauthorRoussel, Philippe
dc.contributor.orcidimecFranco, Jacopo::0000-0002-7382-8605
dc.contributor.orcidimecKaczer, Ben::0000-0002-1484-4007
dc.contributor.orcidimecMitard, Jerome::0000-0002-7422-079X
dc.contributor.orcidimecRagnarsson, Lars-Ake::0000-0003-1057-8140
dc.contributor.orcidimecRoussel, Philippe::0000-0002-0402-8225
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage41
dc.source.endpage50
dc.source.conference20th IEEE International Symposium on the Physicsal and Failure Analysis of Integrated Circuits - IPFA
dc.source.conferencedate15/07/2013
dc.source.conferencelocationSuzhou China
imec.availabilityPublished - open access


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