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Integration of a multi-layer inter-gate dielectric with hybrid floating gate towards 10nm planar NAND flash

dc.contributor.authorBreuil, Laurent
dc.contributor.authorBlomme, Pieter
dc.contributor.authorTan, Chi Lim
dc.contributor.authorLisoni, Judit
dc.contributor.authorSouriau, Laurent
dc.contributor.authorZahid, Mohammed
dc.contributor.authorRichard, Olivier
dc.contributor.authorBender, Hugo
dc.contributor.authorVan den Bosch, Geert
dc.contributor.authorVan Houdt, Jan
dc.date.accessioned2021-10-22T00:49:27Z
dc.date.available2021-10-22T00:49:27Z
dc.date.issued2014
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/23582
dc.sourceIIOimport
dc.titleIntegration of a multi-layer inter-gate dielectric with hybrid floating gate towards 10nm planar NAND flash
dc.typeProceedings paper
dc.contributor.imecauthorBreuil, Laurent
dc.contributor.imecauthorBlomme, Pieter
dc.contributor.imecauthorSouriau, Laurent
dc.contributor.imecauthorRichard, Olivier
dc.contributor.imecauthorBender, Hugo
dc.contributor.imecauthorVan den Bosch, Geert
dc.contributor.imecauthorVan Houdt, Jan
dc.contributor.orcidimecBreuil, Laurent::0000-0003-2869-1651
dc.contributor.orcidimecSouriau, Laurent::0000-0002-5138-5938
dc.contributor.orcidimecRichard, Olivier::0000-0002-3994-8021
dc.contributor.orcidimecVan den Bosch, Geert::0000-0001-9971-6954
dc.contributor.orcidimecVan Houdt, Jan::0000-0003-1381-6925
dc.source.peerreviewyes
dc.source.beginpage51
dc.source.endpage54
dc.source.conference6th International Memory Workshop
dc.source.conferencedate18/05/2014
dc.source.conferencelocationTaipei Taiwan
imec.availabilityPublished - imec


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