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Design technology co-optimization for enabling 5nm gate-all-around nanowire 6T SRAM

dc.contributor.authorHuynh Bao, Trong
dc.contributor.authorSakhare, Sushil
dc.contributor.authorRyckaert, Julien
dc.contributor.authorYakimets, Dmitry
dc.contributor.authorMercha, Abdelkarim
dc.contributor.authorVerkest, Diederik
dc.contributor.authorThean, Aaron
dc.contributor.authorWambacq, Piet
dc.date.accessioned2021-10-22T19:48:52Z
dc.date.available2021-10-22T19:48:52Z
dc.date.issued2015
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/25408
dc.sourceIIOimport
dc.titleDesign technology co-optimization for enabling 5nm gate-all-around nanowire 6T SRAM
dc.typeProceedings paper
dc.contributor.imecauthorRyckaert, Julien
dc.contributor.imecauthorYakimets, Dmitry
dc.contributor.imecauthorMercha, Abdelkarim
dc.contributor.imecauthorVerkest, Diederik
dc.contributor.imecauthorThean, Aaron
dc.contributor.imecauthorWambacq, Piet
dc.contributor.orcidimecMercha, Abdelkarim::0000-0002-2174-6958
dc.contributor.orcidimecVerkest, Diederik::0000-0001-6567-2746
dc.contributor.orcidimecWambacq, Piet::0000-0003-4388-7257
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage1
dc.source.endpage4
dc.source.conferenceInternational Conference on IC Design and Technology - ICICDT
dc.source.conferencedate1/06/2015
dc.source.conferencelocationLeuven Belgium
dc.identifier.urlhttp://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7165874
imec.availabilityPublished - open access


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