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Chip package interaction: A stress analysis on 3D IC's packages

dc.contributor.authorLofrano, Melina
dc.contributor.authorGonzalez, Mario
dc.contributor.authorGuo, Wei
dc.contributor.authorVan der Plas, Geert
dc.date.accessioned2021-10-22T20:39:58Z
dc.date.available2021-10-22T20:39:58Z
dc.date.issued2015
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/25572
dc.sourceIIOimport
dc.titleChip package interaction: A stress analysis on 3D IC's packages
dc.typeProceedings paper
dc.contributor.imecauthorLofrano, Melina
dc.contributor.imecauthorGonzalez, Mario
dc.contributor.imecauthorGuo, Wei
dc.contributor.imecauthorVan der Plas, Geert
dc.contributor.orcidimecVan der Plas, Geert::0000-0002-4975-6672
dc.contributor.orcidimecGonzalez, Mario::0000-0003-4374-4854
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage1
dc.source.endpage9
dc.source.conference16th Int. Conf. Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems - EuroSimE
dc.source.conferencedate19/04/2015
dc.source.conferencelocationBudapest Hungary
dc.identifier.urlhttp://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7103096
imec.availabilityPublished - imec


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