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Extreme scaling enabled by 5 tracks cells : holistic design-device co-optimization for FinFETs and lateral nanowires

dc.contributor.authorGarcia Bardon, Marie
dc.contributor.authorSherazi, Yasser
dc.contributor.authorSchuddinck, Pieter
dc.contributor.authorJang, Doyoung
dc.contributor.authorYakimets, Dmitry
dc.contributor.authorDebacker, Peter
dc.contributor.authorBaert, Rogier
dc.contributor.authorMertens, Hans
dc.contributor.authorBadaroglu, Mustafa
dc.contributor.authorMocuta, Anda
dc.contributor.authorHoriguchi, Naoto
dc.contributor.authorMocuta, Dan
dc.contributor.authorRaghavan, Praveen
dc.contributor.authorRyckaert, Julien
dc.contributor.authorVerkest, Diederik
dc.contributor.authorSteegen, An
dc.date.accessioned2021-10-23T10:54:55Z
dc.date.available2021-10-23T10:54:55Z
dc.date.issued2016
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/26640
dc.sourceIIOimport
dc.titleExtreme scaling enabled by 5 tracks cells : holistic design-device co-optimization for FinFETs and lateral nanowires
dc.typeProceedings paper
dc.contributor.imecauthorGarcia Bardon, Marie
dc.contributor.imecauthorSherazi, Yasser
dc.contributor.imecauthorSchuddinck, Pieter
dc.contributor.imecauthorJang, Doyoung
dc.contributor.imecauthorYakimets, Dmitry
dc.contributor.imecauthorDebacker, Peter
dc.contributor.imecauthorBaert, Rogier
dc.contributor.imecauthorMertens, Hans
dc.contributor.imecauthorBadaroglu, Mustafa
dc.contributor.imecauthorHoriguchi, Naoto
dc.contributor.imecauthorRyckaert, Julien
dc.contributor.imecauthorVerkest, Diederik
dc.contributor.orcidimecDebacker, Peter::0000-0003-3825-5554
dc.contributor.orcidimecHoriguchi, Naoto::0000-0001-5490-0416
dc.contributor.orcidimecVerkest, Diederik::0000-0001-6567-2746
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage687
dc.source.endpage690
dc.source.conferenceIEEE International Electron Devices Meeting - IEDM
dc.source.conferencedate3/12/2016
dc.source.conferencelocationSan Francisco, CA USA
imec.availabilityPublished - open access


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