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A 2nd generation of 14/16nm-node compatible strained-Ge pFINFET with improved performance with respect to advanced Si-channel FinFETs

dc.contributor.authorMitard, Jerome
dc.contributor.authorWitters, Liesbeth
dc.contributor.authorSasaki, Yuichiro
dc.contributor.authorArimura, Hiroaki
dc.contributor.authorSchulze, Andreas
dc.contributor.authorLoo, Roger
dc.contributor.authorRagnarsson, Lars-Ake
dc.contributor.authorHikavyy, Andriy
dc.contributor.authorCott, Daire
dc.contributor.authorChiarella, Thomas
dc.contributor.authorKubicek, Stefan
dc.contributor.authorMertens, Hans
dc.contributor.authorRitzenthaler, Romain
dc.contributor.authorVrancken, Christa
dc.contributor.authorFavia, Paola
dc.contributor.authorBender, Hugo
dc.contributor.authorHoriguchi, Naoto
dc.contributor.authorBarla, Kathy
dc.contributor.authorMocuta, Dan
dc.contributor.authorMocuta, Anda
dc.contributor.authorCollaert, Nadine
dc.contributor.authorThean, Aaron
dc.date.accessioned2021-10-23T12:52:47Z
dc.date.available2021-10-23T12:52:47Z
dc.date.issued2016-06
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/27016
dc.sourceIIOimport
dc.titleA 2nd generation of 14/16nm-node compatible strained-Ge pFINFET with improved performance with respect to advanced Si-channel FinFETs
dc.typeProceedings paper
dc.contributor.imecauthorMitard, Jerome
dc.contributor.imecauthorWitters, Liesbeth
dc.contributor.imecauthorArimura, Hiroaki
dc.contributor.imecauthorLoo, Roger
dc.contributor.imecauthorRagnarsson, Lars-Ake
dc.contributor.imecauthorHikavyy, Andriy
dc.contributor.imecauthorCott, Daire
dc.contributor.imecauthorChiarella, Thomas
dc.contributor.imecauthorKubicek, Stefan
dc.contributor.imecauthorMertens, Hans
dc.contributor.imecauthorRitzenthaler, Romain
dc.contributor.imecauthorVrancken, Christa
dc.contributor.imecauthorFavia, Paola
dc.contributor.imecauthorBender, Hugo
dc.contributor.imecauthorHoriguchi, Naoto
dc.contributor.imecauthorBarla, Kathy
dc.contributor.imecauthorCollaert, Nadine
dc.contributor.imecauthorThean, Aaron
dc.contributor.orcidimecMitard, Jerome::0000-0002-7422-079X
dc.contributor.orcidimecLoo, Roger::0000-0003-3513-6058
dc.contributor.orcidimecRagnarsson, Lars-Ake::0000-0003-1057-8140
dc.contributor.orcidimecHikavyy, Andriy::0000-0002-8201-075X
dc.contributor.orcidimecChiarella, Thomas::0000-0002-6155-9030
dc.contributor.orcidimecRitzenthaler, Romain::0000-0002-8615-3272
dc.contributor.orcidimecFavia, Paola::0000-0002-1019-3497
dc.contributor.orcidimecHoriguchi, Naoto::0000-0001-5490-0416
dc.contributor.orcidimecCollaert, Nadine::0000-0002-8062-3165
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage34
dc.source.endpage35
dc.source.conferenceIEEE Symposium on VLSI Technology
dc.source.conferencedate13/06/2016
dc.source.conferencelocationHonolulu, HI USA
dc.identifier.urlhttp://ieeexplore.ieee.org/document/7573368/?tp=&arnumber=7573368
imec.availabilityPublished - open access


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