dc.contributor.author | Pandey, R | |
dc.contributor.author | Schulte-Braucks, Christian | |
dc.contributor.author | Sajjad, R.N. | |
dc.contributor.author | Barth, M. | |
dc.contributor.author | Ghosh, R | |
dc.contributor.author | Grisafe, B. | |
dc.contributor.author | Sharma, P. | |
dc.contributor.author | von den Driesch, Niels | |
dc.contributor.author | Vohra, Anurag | |
dc.contributor.author | Rayner, R. | |
dc.contributor.author | Loo, Roger | |
dc.contributor.author | Mantl, Siegfried | |
dc.contributor.author | Buca, Dan | |
dc.contributor.author | Yeh, C.C. | |
dc.contributor.author | Wu, C-H. | |
dc.contributor.author | Tsai, Wilman | |
dc.contributor.author | Antoniadis, A. | |
dc.contributor.author | Datta, Suman | |
dc.date.accessioned | 2021-10-23T13:32:25Z | |
dc.date.available | 2021-10-23T13:32:25Z | |
dc.date.issued | 2016-12 | |
dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/27118 | |
dc.source | IIOimport | |
dc.title | Performance benchmarking of p-type In0.65Ga0.35As/GaAs0.4Sb0.6 and Ge/Ge0.93Sn0.07 hetero-junction tunnel FETs for low voltage logic | |
dc.type | Proceedings paper | |
dc.contributor.imecauthor | Vohra, Anurag | |
dc.contributor.imecauthor | Loo, Roger | |
dc.contributor.orcidimec | Vohra, Anurag::0000-0002-2831-0719 | |
dc.contributor.orcidimec | Loo, Roger::0000-0003-3513-6058 | |
dc.date.embargo | 9999-12-31 | |
dc.source.peerreview | yes | |
dc.source.beginpage | 520 | |
dc.source.endpage | 523 | |
dc.source.conference | IEEE International Electron Devices Meeting - IEDM | |
dc.source.conferencedate | 3/12/2016 | |
dc.source.conferencelocation | San Francisco, CA USA | |
imec.availability | Published - open access | |