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Ultra thin gate oxides for 0.1µm heterojunction CMOS applications by the use of a sacrificial Si layer

dc.contributor.authorLoo, Roger
dc.contributor.authorCaymax, Matty
dc.contributor.authorVerheyen, P.
dc.contributor.authorConard, Thierry
dc.contributor.authorBender, Hugo
dc.contributor.authorVandervorst, Wilfried
dc.contributor.authorCollaert, Nadine
dc.contributor.authorDe Meyer, Kristin
dc.date.accessioned2021-10-01T08:29:16Z
dc.date.available2021-10-01T08:29:16Z
dc.date.issued1998
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/2741
dc.sourceIIOimport
dc.titleUltra thin gate oxides for 0.1µm heterojunction CMOS applications by the use of a sacrificial Si layer
dc.typeProceedings paper
dc.contributor.imecauthorLoo, Roger
dc.contributor.imecauthorCaymax, Matty
dc.contributor.imecauthorConard, Thierry
dc.contributor.imecauthorBender, Hugo
dc.contributor.imecauthorVandervorst, Wilfried
dc.contributor.imecauthorCollaert, Nadine
dc.contributor.imecauthorDe Meyer, Kristin
dc.contributor.orcidimecLoo, Roger::0000-0003-3513-6058
dc.contributor.orcidimecConard, Thierry::0000-0002-4298-5851
dc.contributor.orcidimecCollaert, Nadine::0000-0002-8062-3165
dc.source.peerreviewno
dc.source.beginpage608
dc.source.endpage611
dc.source.conferenceProceedings of the 28th European Solid-State Device Research Conference - ESSDERC'98; 8-10 Sept. 1998; Bordeaux, France.
dc.source.conferencelocation
imec.availabilityPublished - imec


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