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Benchmarking of monolithic 3D integrated MX2 FETs with Si FinFETs

dc.contributor.authorAgarwal Kumar, Tarun
dc.contributor.authorSzabo, Aron
dc.contributor.authorGarcia Bardon, Marie
dc.contributor.authorSoree, Bart
dc.contributor.authorRadu, Iuliana
dc.contributor.authorRaghavan, Praveen
dc.contributor.authorLuisier, Mathieu
dc.contributor.authorDehaene, Wim
dc.contributor.authorHeyns, Marc
dc.date.accessioned2021-10-24T02:51:20Z
dc.date.available2021-10-24T02:51:20Z
dc.date.issued2017
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/27720
dc.sourceIIOimport
dc.titleBenchmarking of monolithic 3D integrated MX2 FETs with Si FinFETs
dc.typeProceedings paper
dc.contributor.imecauthorGarcia Bardon, Marie
dc.contributor.imecauthorSoree, Bart
dc.contributor.imecauthorRadu, Iuliana
dc.contributor.imecauthorDehaene, Wim
dc.contributor.imecauthorHeyns, Marc
dc.contributor.orcidimecSoree, Bart::0000-0002-4157-1956
dc.contributor.orcidimecRadu, Iuliana::0000-0002-7230-7218
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage131
dc.source.endpage134
dc.source.conferenceIEEE International Electron Devices Meeting - IEDM
dc.source.conferencedate2/12/2017
dc.source.conferencelocationSan Francisco, CA USA
imec.availabilityPublished - open access


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