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dc.contributor.authorMurdoch, Gayle
dc.contributor.authorBoemmels, Juergen
dc.contributor.authorWilson, Chris
dc.contributor.authorBabaei Gavan, Khashayar
dc.contributor.authorLe, Quoc Toan
dc.contributor.authorTokei, Zsolt
dc.contributor.authorClark, William
dc.date.accessioned2021-10-24T09:47:28Z
dc.date.available2021-10-24T09:47:28Z
dc.date.issued2017
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/29039
dc.sourceIIOimport
dc.titleFeasibility study of fully self aligned vias for 5nm node BEOL
dc.typeProceedings paper
dc.contributor.imecauthorMurdoch, Gayle
dc.contributor.imecauthorBoemmels, Juergen
dc.contributor.imecauthorWilson, Chris
dc.contributor.imecauthorBabaei Gavan, Khashayar
dc.contributor.imecauthorLe, Quoc Toan
dc.contributor.imecauthorTokei, Zsolt
dc.contributor.orcidimecLe, Quoc Toan::0000-0002-0206-6279
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage1
dc.source.endpage4
dc.source.conferenceIEEE International Interconnect Technology Conference - IITC
dc.source.conferencedate16/05/2017
dc.source.conferencelocationHsinchu Taiwan
dc.identifier.urlhttp://ieeexplore.ieee.org/document/7968958/
imec.availabilityPublished - open access


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