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dc.contributor.authorSubirats, Alexandre
dc.contributor.authorArreghini, Antonio
dc.contributor.authorCapogreco, Elena
dc.contributor.authorDelhougne, Romain
dc.contributor.authorTan, Chi Lim
dc.contributor.authorHikavyy, Andriy
dc.contributor.authorBreuil, Laurent
dc.contributor.authorDegraeve, Robin
dc.contributor.authorPutcha, Vamsi
dc.contributor.authorVan den Bosch, Geert
dc.contributor.authorLinten, Dimitri
dc.contributor.authorFurnemont, Arnaud
dc.date.accessioned2021-10-24T14:25:28Z
dc.date.available2021-10-24T14:25:28Z
dc.date.issued2017
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/29521
dc.sourceIIOimport
dc.titleExperimental and theoretical verification of channel conductivity degradation due to grain boundaries and defects in 3D NAND
dc.typeProceedings paper
dc.contributor.imecauthorArreghini, Antonio
dc.contributor.imecauthorCapogreco, Elena
dc.contributor.imecauthorDelhougne, Romain
dc.contributor.imecauthorHikavyy, Andriy
dc.contributor.imecauthorBreuil, Laurent
dc.contributor.imecauthorDegraeve, Robin
dc.contributor.imecauthorPutcha, Vamsi
dc.contributor.imecauthorVan den Bosch, Geert
dc.contributor.imecauthorLinten, Dimitri
dc.contributor.imecauthorFurnemont, Arnaud
dc.contributor.orcidimecArreghini, Antonio::0000-0002-7493-9681
dc.contributor.orcidimecHikavyy, Andriy::0000-0002-8201-075X
dc.contributor.orcidimecBreuil, Laurent::0000-0003-2869-1651
dc.contributor.orcidimecPutcha, Vamsi::0000-0003-1907-5486
dc.contributor.orcidimecVan den Bosch, Geert::0000-0001-9971-6954
dc.contributor.orcidimecLinten, Dimitri::0000-0001-8434-1838
dc.contributor.orcidimecFurnemont, Arnaud::0000-0002-6378-1030
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage517
dc.source.endpage520
dc.source.conferenceIEEE International Electron Devices Meeting - IEDM
dc.source.conferencedate2/12/2017
dc.source.conferencelocationSan Francisco, CA USA
dc.identifier.urlhttp://ieeexplore.ieee.org/document/8268433/
imec.availabilityPublished - open access
imec.internalnotes


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