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N7 FinFET self-aligned quadruple patterning modeling

dc.contributor.authorBaudot, Sylvain
dc.contributor.authorGuissi, Sofiane
dc.contributor.authorMilenin, Alexey
dc.contributor.authorErvin, Joe
dc.contributor.authorSchram, Tom
dc.date.accessioned2021-10-25T16:40:43Z
dc.date.available2021-10-25T16:40:43Z
dc.date.issued2018
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/30216
dc.sourceIIOimport
dc.titleN7 FinFET self-aligned quadruple patterning modeling
dc.typeProceedings paper
dc.contributor.imecauthorBaudot, Sylvain
dc.contributor.imecauthorGuissi, Sofiane
dc.contributor.imecauthorMilenin, Alexey
dc.contributor.imecauthorSchram, Tom
dc.contributor.orcidimecMilenin, Alexey::0000-0003-0747-0462
dc.contributor.orcidimecSchram, Tom::0000-0003-1533-7055
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage344
dc.source.endpage347
dc.source.conference2018 International Conference on Simulation of Semiconductor Processes and Devices - SISPAD
dc.source.conferencedate24/09/2018
dc.source.conferencelocationAustin Texas
dc.identifier.urlhttps://ieeexplore.ieee.org/document/8551646
imec.availabilityPublished - open access


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