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Defect mitigation in sub-20 nm patterning with high-chi, silicon containing block copolymers

dc.contributor.authorDoise, Jan
dc.contributor.authorMannaert, Geert
dc.contributor.authorSuh, Hyo Seon
dc.contributor.authorRincon Delgadillo, Paulina
dc.contributor.authorVandenberghe, Geert
dc.contributor.authorWillson, C. Grant
dc.contributor.authorEllison, Christopher J.
dc.date.accessioned2021-10-25T18:19:47Z
dc.date.available2021-10-25T18:19:47Z
dc.date.issued2018
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/30650
dc.sourceIIOimport
dc.titleDefect mitigation in sub-20 nm patterning with high-chi, silicon containing block copolymers
dc.typeProceedings paper
dc.contributor.imecauthorDoise, Jan
dc.contributor.imecauthorMannaert, Geert
dc.contributor.imecauthorSuh, Hyo Seon
dc.contributor.imecauthorRincon Delgadillo, Paulina
dc.contributor.imecauthorVandenberghe, Geert
dc.source.peerreviewno
dc.source.conference4th International Symposium on DSA
dc.source.conferencedate11/11/2018
dc.source.conferencelocationSapporo Japan
imec.availabilityPublished - imec


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