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Challenges for I/O towards the 3-nm node: Si/SiGe superlatttice I/O finFET in a horizontal nanowire technology and the increased ausceptibility of bulk finFET technology to single event latchup
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Challenges for I/O towards the 3-nm node: Si/SiGe superlatttice I/O finFET in a horizontal nanowire technology and the increased ausceptibility of bulk finFET technology to single event latchup
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Date
2018
Proceedings Paper
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APA
Chicago
Harvard
IEEE
Basic data
APA
Chicago
Harvard
IEEE
Author(s)
Hellings, Geert
;
Mertens, Hans
;
Karp, James
;
Maillard, Pierre
;
Subirats, Alexandre
;
Simoen, Eddy
;
Schram, Tom
;
Ragnarsson, Lars-Ake
;
Simicic, Marko
;
Chen, Shih-Hung
;
Parvais, Bertrand
;
Boudier, D
;
Cretu, B
;
Machillot, J
;
Pena, V
;
Sun, S
;
Yoshida, N
;
Kim, N
;
Mocuta, Anda
;
Linten, Dimitri
;
Hart, Michael
;
Horiguchi, Naoto
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1973
since deposited on 2021-10-25
1
last month
Acq. date: 2026-01-09
Citations
Metrics
Views
1973
since deposited on 2021-10-25
1
last month
Acq. date: 2026-01-09
Citations