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Low temperature junctionless device stacking enabled by leading edge

dc.contributor.authorBesnard, Guillaume
dc.contributor.authorGaudin, Gweltaz
dc.contributor.authorSchwarzenbach, Walter
dc.contributor.authorEcarnot, Ludovic
dc.contributor.authorRadu, Ioniut
dc.contributor.authorNguyen, Bich-Yen
dc.contributor.authorVandooren, Anne
dc.contributor.authorCollaert, Nadine
dc.date.accessioned2021-10-27T07:33:20Z
dc.date.available2021-10-27T07:33:20Z
dc.date.issued2019-04
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/32529
dc.sourceIIOimport
dc.titleLow temperature junctionless device stacking enabled by leading edge
dc.typeMeeting abstract
dc.contributor.imecauthorBesnard, Guillaume
dc.contributor.imecauthorVandooren, Anne
dc.contributor.imecauthorCollaert, Nadine
dc.contributor.orcidimecVandooren, Anne::0000-0002-2412-0176
dc.contributor.orcidimecCollaert, Nadine::0000-0002-8062-3165
dc.source.peerreviewyes
dc.source.beginpage1
dc.source.endpage2
dc.source.conference2019 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)
dc.source.conferencedate22/04/2019
dc.source.conferencelocationHsinchu Taiwan
dc.identifier.urlhttps://ieeexplore.ieee.org/document/8804665
imec.availabilityPublished - imec


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