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Buried power rails and back-side power grids: ARM CPU power delivery network design beyond 5nm
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Authors
Prasad, D.
;
Nibhanupudi, S.
;
Das, S.
;
Zografos, Odysseas
;
Chehab, Bilal
;
Sarkar, Satadru
;
Baert, Rogier
;
Robinson, A.
;
Gupta, Anshul
;
Spessot, Alessio
;
Debacker, Peter
;
Verkest, Diederik
;
Kulkarni, J.
;
Cline, B.
;
Sinha, S.
Conference
IEEE International Electron Devices Meeting - IEDM 2019
Title
Buried power rails and back-side power grids: ARM CPU power delivery network design beyond 5nm
Publication type
Proceedings paper
Embargo date
9999-12-31
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