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Enabling sub-5nm CMOS technology scaling thinner and taller!

dc.contributor.authorRyckaert, Julien
dc.contributor.authorNa, Myung Hee
dc.contributor.authorWeckx, Pieter
dc.contributor.authorJang, Doyoung
dc.contributor.authorSchuddinck, Pieter
dc.contributor.authorChehab, Bilal
dc.contributor.authorPatli, Sudhir
dc.contributor.authorSarkar, Satadru
dc.contributor.authorZografos, Odysseas
dc.contributor.authorBaert, Rogier
dc.contributor.authorVerkest, Diederik
dc.date.accessioned2021-10-27T17:22:18Z
dc.date.available2021-10-27T17:22:18Z
dc.date.issued2019
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/33918
dc.sourceIIOimport
dc.titleEnabling sub-5nm CMOS technology scaling thinner and taller!
dc.typeProceedings paper
dc.contributor.imecauthorRyckaert, Julien
dc.contributor.imecauthorNa, Myung Hee
dc.contributor.imecauthorWeckx, Pieter
dc.contributor.imecauthorJang, Doyoung
dc.contributor.imecauthorSchuddinck, Pieter
dc.contributor.imecauthorChehab, Bilal
dc.contributor.imecauthorPatli, Sudhir
dc.contributor.imecauthorSarkar, Satadru
dc.contributor.imecauthorZografos, Odysseas
dc.contributor.imecauthorBaert, Rogier
dc.contributor.imecauthorVerkest, Diederik
dc.contributor.orcidimecZografos, Odysseas::0000-0002-9998-8009
dc.contributor.orcidimecVerkest, Diederik::0000-0001-6567-2746
dc.source.peerreviewyes
dc.source.conference65th IEEE Annual International Electron Devices Meeting (IEDM)
dc.source.conferencedate9/12/2019
dc.source.conferencelocationSan Francisco, CA USA
imec.availabilityPublished - imec


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