Publication:

Patterning challenges for beyond 3nm logic devices: Example of an interconnected magnetic tunnel junction

Date

2019

Proceedings Paper

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Author(s)

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Souriau, Laurent

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Babaei Gavan, Khashayar

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Rassoul, Nouredine

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Couet, Sebastien

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Raymenants, Eline

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Trivkovic, Darko

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Ercken, Monique

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Acq. date: 2026-02-25