Show simple item record

Probing complexities of 3D-stacked ICs – A test engineers' perspective

dc.contributor.authorFodor, Ferenc
dc.contributor.authorDe Wachter, Bart
dc.contributor.authorPodpod, Arnita
dc.contributor.authorStucchi, Michele
dc.contributor.authorMarinissen, Erik Jan
dc.date.accessioned2021-10-28T21:42:21Z
dc.date.available2021-10-28T21:42:21Z
dc.date.issued2020-11
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/35127
dc.sourceIIOimport
dc.titleProbing complexities of 3D-stacked ICs – A test engineers' perspective
dc.typeMeeting abstract
dc.contributor.imecauthorFodor, Ferenc
dc.contributor.imecauthorDe Wachter, Bart
dc.contributor.imecauthorPodpod, Arnita
dc.contributor.imecauthorStucchi, Michele
dc.contributor.imecauthorMarinissen, Erik Jan
dc.contributor.orcidimecMarinissen, Erik Jan::0000-0002-5058-8303
dc.source.peerreviewyes
dc.source.beginpage98
dc.source.endpage128
dc.source.conference7th IEEE International Workshop on Testing Three-Dimensional, Chiplet-Based, and Stacked ICs (3DC-TEST)
dc.source.conferencedate5/11/2020
dc.source.conferencelocationWashington, DC USA
dc.identifier.urlhttps://pld.ttu.ee/3dtest20/index.php?page=45
imec.availabilityPublished - imec


Files in this item

FilesSizeFormatView

There are no files associated with this item.

This item appears in the following collection(s)

Show simple item record