Surround Gate Transistor With Epitaxially Grown Si Pillar and Simulation Study on Soft Error and Rowhammer Tolerance for DRAM

Han, Jin-Woo; Kim, Jungsik; Beery, Dafna; Bozdag, K. Deniz; Cuevas, Peter; Levi, Amitay; Tain, Irwin; Tran, Khai; Walker, Andrew J.; Vadakupudhu Palayam, Senthil; Arreghini, Antonio; Furnemont, Arnaud; Meyappan, M.

doi:10.1109/TED.2020.3045966

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Surround Gate Transistor With Epitaxially Grown Si Pillar and Simulation Study on Soft Error and Rowhammer Tolerance for DRAM

Date

2021

Journal article

https://doi.org/10.1109/TED.2020.3045966

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Vadakupudhu Palayam, Senthil

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Arreghini, Antonio

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Furnemont, Arnaud

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Meyappan, M.

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IEEE TRANSACTIONS ON ELECTRON DEVICES

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1407 since deposited on 2021-11-02

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Acq. date: 2025-12-13

Surround Gate Transistor With Epitaxially Grown Si Pillar and Simulation Study on Soft Error and Rowhammer Tolerance for DRAM

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