Electromigration limits of copper nano-interconnects

Abstract

In this paper the electromigration (EM) limits of Cu nano-interconnects are studied considering the impact of microstructure in Co cap schemes and performance booster technologies i.e. via pre-fill and scaled barrier-liner schemes. A combination of experimental and physics-based modelling approaches is employed to provide fundamental understanding of the involved mechanisms. The results show that linewidth reduction, higher trench depth, i.e. larger aspect ratio (AR) and thinner barrier and liners result in more polycrystalline copper texture. It was found that at 10.5 nm linewidth, similar to 95% of the nano-interconnect length is polycrystalline while for 25 nm linewidth this is similar to 85% A 90% drop of j(fail) i.e. the current density that induces failure at 10 years, was found by scaling linewidth from 25 nm to 10.5 nm in Cu interconnects with Co cap. Experiments show a 70% drop of time to failure due to barrier film thickness scaling from 3 nm to 2 nm for PVD TaN. Utilization of Co cap and via prefill were found to increase j(fail) by similar to 10 fold and similar to 3 fold, respectively.