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Novel low thermal budget gate stack solutions for BTI reliability in future Logic Device technologies
dc.contributor.author | Franco, J. | |
dc.contributor.author | Arimura, H. | |
dc.contributor.author | de Marneffe, J-F | |
dc.contributor.author | Vandooren, A. | |
dc.contributor.author | Ragnarsson, L-A | |
dc.contributor.author | Wu, Z. | |
dc.contributor.author | Claes, D. | |
dc.contributor.author | Litta, E. Dentoni | |
dc.contributor.author | Horiguchi, N. | |
dc.contributor.author | Croes, K. | |
dc.contributor.author | Linten, D. | |
dc.contributor.author | Grasser, T. | |
dc.contributor.author | Kaczer, B. | |
dc.date.accessioned | 2022-09-19T02:51:16Z | |
dc.date.available | 2022-09-19T02:51:16Z | |
dc.date.issued | 2021 | |
dc.identifier.issn | 2381-3555 | |
dc.identifier.other | WOS:000851575300015 | |
dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/40462 | |
dc.source | WOS | |
dc.title | Novel low thermal budget gate stack solutions for BTI reliability in future Logic Device technologies | |
dc.type | Proceedings paper | |
dc.contributor.imecauthor | Franco, J. | |
dc.contributor.imecauthor | Arimura, H. | |
dc.contributor.imecauthor | de Marneffe, J-F | |
dc.contributor.imecauthor | Vandooren, A. | |
dc.contributor.imecauthor | Ragnarsson, L-A | |
dc.contributor.imecauthor | Litta, E. Dentoni | |
dc.contributor.imecauthor | Horiguchi, N. | |
dc.contributor.imecauthor | Croes, K. | |
dc.contributor.imecauthor | Linten, D. | |
dc.contributor.imecauthor | Kaczer, B. | |
dc.identifier.doi | 10.1109/ICICDT51558.2021.9626482 | |
dc.identifier.eisbn | 978-1-6654-4998-4 | |
dc.source.numberofpages | 4 | |
dc.source.peerreview | yes | |
dc.source.conference | International Conference on IC Design and Technology (ICICDT) | |
dc.source.conferencedate | SEP 15-17, 2021 | |
imec.availability | Under review |
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