Show simple item record

Scaling of double-gated WS2 FETs to sub-5nm physical gate length fabricated in a 300mm FAB

dc.contributor.authorSmets, Quentin
dc.contributor.authorSchram, Tom
dc.contributor.authorVerreck, Devin
dc.contributor.authorCott, Daire
dc.contributor.authorGroven, Benjamin
dc.contributor.authorAhmed, Zubair
dc.contributor.authorKaczer, Ben
dc.contributor.authorMitard, Jerome
dc.contributor.authorWu, Xiangyu
dc.contributor.authorKundu, Souvik
dc.contributor.authorMertens, Hans
dc.contributor.authorRadisic, Dunja
dc.contributor.authorThiam, Arame
dc.contributor.authorLi, Waikin
dc.contributor.authorDupuy, Emmanuel
dc.contributor.authorTao, Zheng
dc.contributor.authorVandersmissen, Kevin
dc.contributor.authorMaurice, Thibaut
dc.contributor.authorLin, Dennis
dc.contributor.authorMorin, Pierre
dc.contributor.authorAsselberghs, Inge
dc.contributor.authorRadu, Iuliana
dc.date.accessioned2023-08-08T07:55:19Z
dc.date.available2023-06-20T10:33:46Z
dc.date.available2023-08-08T07:55:19Z
dc.date.issued2021
dc.identifier.issn2380-9248
dc.identifier.otherWOS:000812325400023
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/41825.2
dc.sourceWOS
dc.titleScaling of double-gated WS2 FETs to sub-5nm physical gate length fabricated in a 300mm FAB
dc.typeProceedings paper
dc.contributor.imecauthorSmets, Quentin
dc.contributor.imecauthorSchram, Tom
dc.contributor.imecauthorVerreck, Devin
dc.contributor.imecauthorCott, Daire
dc.contributor.imecauthorGroven, Benjamin
dc.contributor.imecauthorAhmed, Zubair
dc.contributor.imecauthorKaczer, Ben
dc.contributor.imecauthorMitard, Jerome
dc.contributor.imecauthorWu, Xiangyu
dc.contributor.imecauthorKundu, Souvik
dc.contributor.imecauthorMertens, Hans
dc.contributor.imecauthorRadisic, Dunja
dc.contributor.imecauthorThiam, Arame
dc.contributor.imecauthorLi, Waikin
dc.contributor.imecauthorDupuy, Emmanuel
dc.contributor.imecauthorTao, Zheng
dc.contributor.imecauthorVandersmissen, Kevin
dc.contributor.imecauthorMaurice, Thibaut
dc.contributor.imecauthorLin, Dennis
dc.contributor.imecauthorMorin, Pierre
dc.contributor.imecauthorAsselberghs, Inge
dc.contributor.imecauthorRadu, Iuliana
dc.contributor.orcidimecSchram, Tom::0000-0003-1533-7055
dc.contributor.orcidimecVerreck, Devin::0000-0002-3833-5880
dc.contributor.orcidimecGroven, Benjamin::0000-0002-5781-7594
dc.contributor.orcidimecAhmed, Zubair::0000-0002-8609-6298
dc.contributor.orcidimecKaczer, Ben::0000-0002-1484-4007
dc.contributor.orcidimecWu, Xiangyu::0000-0002-8418-5502
dc.contributor.orcidimecKundu, Souvik::0000-0002-3533-9405
dc.contributor.orcidimecTao, Zheng::0000-0001-7801-2560
dc.contributor.orcidimecRadu, Iuliana::0000-0002-6388-729X
dc.contributor.orcidimecSmets, Quentin::0000-0002-2356-5915
dc.contributor.orcidimecMitard, Jerome::0000-0002-7422-079X
dc.contributor.orcidimecDupuy, Emmanuel::0000-0003-3341-1618
dc.contributor.orcidimecMaurice, Thibaut::0000-0002-8919-1071
dc.contributor.orcidimecMorin, Pierre::0000-0002-4637-496X
dc.contributor.orcidimecAsselberghs, Inge::0000-0001-8371-3222
dc.contributor.orcidimecRadu, Iuliana::0000-0002-7230-7218
dc.date.embargo9999-12-31
dc.identifier.doi10.1109/IEDM19574.2021.9720517
dc.identifier.eisbn978-1-6654-2572-8
dc.source.numberofpages4
dc.source.peerreviewyes
dc.source.beginpage725
dc.source.endpage728
dc.source.conferenceIEEE International Electron Devices Meeting (IEDM)
dc.source.conferencedateDEC 11-16, 2021
dc.source.conferencelocationSan Francisco
dc.source.journalna
imec.availabilityPublished - imec


Files in this item

Thumbnail
Name:
Scaling_of_double-gated_WS2_FE ...
Size:
1.516Mb
Format:
PDF
Description:
Published version
View/open

This item appears in the following collection(s)

Show simple item record

Version history

VersionItemDateSummary
220.500.12860/41825.2*2023-08-08T07:52:39Zvalidation by library/open access desk
120.500.12860/418252023-06-20T10:33:46Z

*Selected version