dc.contributor.author | Pei, Zhenlin | |
dc.contributor.author | Mayahinia, Mahta | |
dc.contributor.author | Liu, Hsiao-Hsuan | |
dc.contributor.author | Tahoori, Mehdi | |
dc.contributor.author | Catthoor, Francky | |
dc.contributor.author | Tokei, Zsolt | |
dc.contributor.author | Pan, Chenyun | |
dc.date.accessioned | 2023-11-30T08:13:25Z | |
dc.date.available | 2023-08-24T17:41:50Z | |
dc.date.available | 2023-08-29T07:46:57Z | |
dc.date.available | 2023-11-30T08:13:25Z | |
dc.date.issued | 2023 | |
dc.identifier.issn | na | |
dc.identifier.other | WOS:001042307500028 | |
dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/42394.3 | |
dc.source | WOS | |
dc.title | Technology/Memory Co-Design and Co-Optimization Using E-Tree Interconnect | |
dc.type | Proceedings paper | |
dc.contributor.imecauthor | Liu, Hsiao-Hsuan | |
dc.contributor.imecauthor | Catthoor, Francky | |
dc.contributor.imecauthor | Tokei, Zsolt | |
dc.contributor.orcidimec | Catthoor, Francky::0000-0002-3599-8515 | |
dc.contributor.orcidimec | Tokei, Zsolt::0000-0003-3545-3424 | |
dc.date.embargo | 2023-07-30 | |
dc.identifier.doi | 10.1145/3583781.3590311 | |
dc.identifier.eisbn | 979-8-4007-0125-2 | |
dc.source.numberofpages | 4 | |
dc.source.peerreview | yes | |
dc.source.beginpage | 159 | |
dc.source.endpage | 162 | |
dc.source.conference | 33rd Great Lakes Symposium on VLSI (GLSVLSI) | |
dc.source.conferencedate | JUN 05-07, 2023 | |
dc.source.conferencelocation | Knoxville | |
dc.source.journal | not applicable | |
imec.availability | Published - open access | |
dc.description.wosFundingText | This work was partially funded by IMEC, the Department of Energy (DoE) under Award DE-SC0022881, and in part by the National Science Foundation (NSF) under Grant CCF-2219753. | |