An Energy Efficient Amplifier with a Closed Loop Gm-Boosting Output Stage for Large Capacitive Loads Achieving 686,685 MHz.pF/mA IFoMs

Abstract

This paper proposed a low-power two-stage amplifier for large capacitive load driving. A closed-loop gmboosted (CLGB) output stage is exploited to reduce the output resistance and thus makes the output pole non-dominant. This allows an internally defined dominant pole, resulting in a high gain-bandwidth (GBW) without using compensation capacitor. Meanwhile, a current-reuse stacked (CRS) slew rate (SR) enhancement circuit is implemented to increase the current driving capability. This circuit reuses the quiescent current (I-Q) and leverages a signal-dependent positive feedback of cross-coupled pair to enlarge the enhancing current. The proposed amplifier is fabricated in a standard 55 nm CMOS technology, with an active area of 0.006 mm(2). It achieves a bandwidth of 1.03 MHz at 12nF C-L, reaching an IFoMs of 686,685 that advances the state-of-the art by X1.8. It provides an SR of 0.09 V/mu s with a 12 nF load, reaching an LC-FoMs of 2080,845, which exceeds the state-of-the art by more than X4. The excellent GBW and SR with an IQ of only 18 mu A makes the proposed amplifier suitable for large capacitance driving applications.