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Conference contributions
3D metrology and inspection to enable the rise of stacked transistors, wafers and chips
Publication:
3D metrology and inspection to enable the rise of stacked transistors, wafers and chips
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Date
2025
Proceedings Paper
https://doi.org/10.1117/12.3052399
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APA
Chicago
Harvard
IEEE
Basic data
APA
Chicago
Harvard
IEEE
Author(s)
Bogdanowicz, Janusz
;
Charley, Anne-Laure
;
Leray, Philippe
;
Liu, Ru-Gun
Journal
Proceedings of SPIE
Abstract
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44
since deposited on 2025-07-28
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Acq. date: 2026-01-10
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Metrics
Views
44
since deposited on 2025-07-28
7
last month
Acq. date: 2026-01-10
Citations