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The effect of deposition and annealing conditions on the stress in metallization materials for VLSI interconnects

dc.contributor.authorWitvrouw, Ann
dc.contributor.authorMaex, Karen
dc.date.accessioned2021-09-29T12:53:29Z
dc.date.available2021-09-29T12:53:29Z
dc.date.issued1994
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/462
dc.sourceIIOimport
dc.titleThe effect of deposition and annealing conditions on the stress in metallization materials for VLSI interconnects
dc.typeProceedings paper
dc.contributor.imecauthorMaex, Karen
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.beginpage313
dc.source.conference11th VLSI Multilevel Interconnect Conference - VMIC
dc.source.conferencedate07/06/1994
dc.source.conferencelocationSanta Clara, CA USA
imec.availabilityPublished - open access


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