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Analysis of process-induced stresses in lateral trench isolation structures for high voltage devices in bonded SOI wafers

dc.contributor.authorBaumgart, H.
dc.contributor.authorLetavic, T. J.
dc.contributor.authorDe Wolf, Ingrid
dc.contributor.authorMaes, Herman
dc.contributor.authorEgloff, R.
dc.date.accessioned2021-09-29T13:04:12Z
dc.date.available2021-09-29T13:04:12Z
dc.date.issued1995
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/516
dc.sourceIIOimport
dc.titleAnalysis of process-induced stresses in lateral trench isolation structures for high voltage devices in bonded SOI wafers
dc.typeProceedings paper
dc.contributor.imecauthorDe Wolf, Ingrid
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.beginpage440
dc.source.endpage54
dc.source.conferenceProceedings of the Third International Symposium on Semiconductor Wafer Bonding: Physics and Applications
dc.source.conferencedate21/05/1995
dc.source.conferencelocationReno, NV USA
imec.availabilityPublished - open access
imec.internalnotesECS Proceedings; Vol. 95-7


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