Publication:
NbTiN based two-metal level semi-damascene interconnects, Josephson junctions and capacitors for Superconducting Digital Logic
Date
2024
Proceedings Paper
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Author(s)
Journal
2024 IEEE INTERNATIONAL ELECTRON DEVICES MEETING, IEDM
Abstract
Superconducting Digital (SCD) is a promising alternative to conventional complementary metal-oxide semiconductor (CMOS) technology, enabling high-speed and energy-efficient computing for Artificial Intelligence (AI) and High-Performance Computing (HPC). Here, we report the fabrication of three device modules that are the core building blocks for scalable SCD technology: 1) NbTiN BEOL interconnects, 2) NbTiN/aSi/NbTiN Josephson junctions (JJs), and 3) NbTiN/HZO/NbTiN tunable Metal-Insulator-Metal (MIM) capacitors. Material characterization and electrical measurements demonstrate high-quality superconducting devices with critical dimensions (CDs) down to 50 nm. NbTiN interconnects have critical temperature Tc>13K and high critical current density Jc>120mA/μm2, amorphous Si α Si) based JJs have JC>0.8mA/μm2, with a ICRN of ∼1.1mV. The tunable HZO MIM capacitors have high specific capacitance Cf of ∼28 fF/μm2 and k-value of 30. All devices were fabricated on 300 mm wafers within thermal budget of 420 ∘C using fabrication processes compatible with standard CMOS technology, representing many firsts, hence bridging the gap from feasibility studies to industrial fabrication.