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dc.contributor.authorBreuil, Laurent
dc.contributor.authorSchuler, Franz
dc.contributor.authorHaspeslagh, Luc
dc.contributor.authorWellekens, Dirk
dc.contributor.authorDe Vos, Joeri
dc.contributor.authorLorenzini, Martino
dc.contributor.authorVan Houdt, Jan
dc.date.accessioned2021-10-15T04:04:09Z
dc.date.available2021-10-15T04:04:09Z
dc.date.issued2003
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/7257
dc.sourceIIOimport
dc.titleA new 2 isolated-bits/cell Flash memory device with self aligned split gate structure using ONO stacks for charge storage
dc.typeProceedings paper
dc.contributor.imecauthorBreuil, Laurent
dc.contributor.imecauthorHaspeslagh, Luc
dc.contributor.imecauthorWellekens, Dirk
dc.contributor.imecauthorDe Vos, Joeri
dc.contributor.imecauthorVan Houdt, Jan
dc.contributor.orcidimecBreuil, Laurent::0000-0003-2869-1651
dc.contributor.orcidimecDe Vos, Joeri::0000-0002-9332-9336
dc.contributor.orcidimecVan Houdt, Jan::0000-0003-1381-6925
dc.source.peerreviewno
dc.source.beginpage46
dc.source.endpage47
dc.source.conference19th IEEE Nonvolatile Semiconductor Memory Workshop - NVSMW
dc.source.conferencedate16/02/2003
dc.source.conferencelocationMonterey, CA USA
imec.availabilityPublished - imec


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