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Noise and tunnelling through the 2.5 nm gate in SOI MOSFETs

dc.contributor.authorLukyanchikova, N.
dc.contributor.authorSimoen, Eddy
dc.contributor.authorMercha, Abdelkarim
dc.contributor.authorClaeys, Cor
dc.date.accessioned2021-10-15T05:30:23Z
dc.date.available2021-10-15T05:30:23Z
dc.date.issued2003
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/7835
dc.sourceIIOimport
dc.titleNoise and tunnelling through the 2.5 nm gate in SOI MOSFETs
dc.typeOral presentation
dc.contributor.imecauthorSimoen, Eddy
dc.contributor.imecauthorMercha, Abdelkarim
dc.contributor.orcidimecSimoen, Eddy::0000-0002-5218-4046
dc.contributor.orcidimecMercha, Abdelkarim::0000-0002-2174-6958
dc.source.peerreviewno
dc.source.conferenceNATO Advanced Workshop on Advanced Experimental Methods for Noise Research in Nanoelectronic Devices
dc.source.conferencedate14/08/2003
dc.source.conferencelocationBrno Czech Republic
imec.availabilityPublished - imec


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