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Challenges in patterning 45nm node multiple-gate devices and SRAM cells

dc.contributor.authorErcken, Monique
dc.contributor.authorDelvaux, Christie
dc.contributor.authorBaerts, Christina
dc.contributor.authorLocorotondo, Sabrina
dc.contributor.authorDegroote, Bart
dc.contributor.authorWiaux, Vincent
dc.contributor.authorNackaerts, Axel
dc.contributor.authorRooyackers, Rita
dc.contributor.authorVerhaegen, Staf
dc.contributor.authorPollentier, Ivan
dc.date.accessioned2021-10-15T13:21:43Z
dc.date.available2021-10-15T13:21:43Z
dc.date.issued2004
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/8887
dc.sourceIIOimport
dc.titleChallenges in patterning 45nm node multiple-gate devices and SRAM cells
dc.typeProceedings paper
dc.contributor.imecauthorErcken, Monique
dc.contributor.imecauthorDelvaux, Christie
dc.contributor.imecauthorBaerts, Christina
dc.contributor.imecauthorLocorotondo, Sabrina
dc.contributor.imecauthorWiaux, Vincent
dc.contributor.imecauthorPollentier, Ivan
dc.contributor.orcidimecPollentier, Ivan::0000-0002-4266-6500
dc.source.peerreviewno
dc.source.conferenceProceedings 41st Interface Symposium
dc.source.conferencedate26/09/2004
dc.source.conferencelocationTempe, AZ USA
imec.availabilityPublished - imec
imec.internalnotesCD-ROM proceedings


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