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Simulations of bias temperature instabilities in p-MOSFETs with HfySiOx-based gate dielectrics

dc.contributor.authorHoussa, Michel
dc.contributor.authorBizzari, C.
dc.contributor.authorAutran, J.L.
dc.date.accessioned2021-10-15T13:56:08Z
dc.date.available2021-10-15T13:56:08Z
dc.date.issued2004
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/9061
dc.sourceIIOimport
dc.titleSimulations of bias temperature instabilities in p-MOSFETs with HfySiOx-based gate dielectrics
dc.typeProceedings paper
dc.contributor.imecauthorHoussa, Michel
dc.contributor.orcidimecHoussa, Michel::0000-0003-1844-3515
dc.source.peerreviewno
dc.source.beginpage333
dc.source.endpage341
dc.source.conferencePhysics and Technology of High-k Gate Dielectrics II
dc.source.conferencedate12/10/2003
dc.source.conferencelocationOrlando, FL USA
imec.availabilityPublished - imec
imec.internalnotesElectrochemical Society Proceedings; Vol. PV 2003-22


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