Browsing by Author "Asimakopoulos, Panagiotis"
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Publication Comprehensive analysis of the impact of single and arrays of through silicon vias induced stress on high-k / metal gate CMOS performances
Proceedings paper2010, IEEE International Electron Devices Meeting - IEDM, 6/12/2010, p.26-29Publication Evaluation of energy-recovering interconnects for low-power 3D stacked ICs
Proceedings paper2009, IEEE International Conference on 3D System Integration - 3DIC, 28/09/2009, p.1-5Publication Impact of thinning and through silicon via proximity on high-k / metal gate first CMOS performance
Proceedings paper2010, IEEE Symposium on VLSI Technology, 15/06/2010, p.109-110