Browsing by Author "Chiu, Eddie"
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Publication Gate-all-around InGaAs nanowire FETs with peak transconductance of 2200 μS/μm at 50nm Lg using a replacement fin RMG flow
Proceedings paper2015, IEEE International Electron Devices Meeting - IEDM, 7/12/2015, p.799-802Publication Novel gate stack engineering for high mobility Ge nFETs
Meeting abstract2018, MRS Spring Meeting, 3/04/2018Publication Observation of plasma-induced damage in bulk germanium p-type FinFET devices and curing in high-pressure anneal
Journal article2019, IEEE Transactions on Device and Materials Reliability, (19) 2, p.468-470Publication Performance and electrostatic improvement by high-pressure anneal on Si-passivated strained Ge pFinFET and gate all around devices with superior NBTI reliability
Proceedings paper2017, Symposium on VLSI Technology, 5/06/2017, p.196-197Publication Si-passivated Ge nMOS gate stack with low DIT and dipole-induced superior PBTI reliability using 3D-compatible ALD caps and high-pressure anneal
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