Browsing by Author "Choi, M."
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Publication Analysis of microbump induced stress effects in 3D stacked IC technologies
; ; Proceedings paper2012, IEEE International 3D System Integration Conference - 3DIC, 31/01/2012, p.9-AprPublication Comprehensive analysis of the impact of single and arrays of through silicon vias induced stress on high-k / metal gate CMOS performances
Proceedings paper2010, IEEE International Electron Devices Meeting - IEDM, 6/12/2010, p.26-29Publication Copper through silicon via induced keep out zone for 10nm node bulk FinFET CMOS technology
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