Browsing by Author "Dehaene, Wim"
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Publication 3-D technology assessment: path-finding the technology/design sweet-spot
Journal article2009, Proceedings of the IEEE, (97) 1, p.96-107Publication 3D IO interface design between memory and logic dies on TSV interconnects
Proceedings paper2009, HPCA-15 / Workshop on 3D Integration and Interconnection-Centric Architectures, 14/02/2009Publication 3D stacked IC demonstration using a through silicon via first approach
Proceedings paper2008, Technical Digest International Electron Devices Meeting - IEDM, 15/12/2008, p.603-606Publication 3D stacked IC demonstrator using hybrid collective die-to-wafer bonding with copper through silicon vias (TSV)
; ; ; ; Proceedings paper2009, IEEE 3D-IC, 28/09/2009Publication 3D stacked ICs using Cu TSVs and die to wafer hybrid collective bonding
Proceedings paper2009, IEEE International Electron Devices Meeting - IEDM, 7/12/2009, p.357-360Publication 40x current variation reduction enabled by an external VT-compensation scheme for AMOLED displays using a 3T2C-pixel circuit with dual-gate TFTs
Proceedings paper2018, SID's Display Week Symposium, 20/05/2018Publication 8b thin-film microprocessor using a hybrid oxide-organic complementary technology with inkjet-printed P2ROM memory
Proceedings paper2014, IEEE International Solid-State Circuits Conference - ISSCC, 9/02/2014, p.486-487Publication 8T SRAM with Mimicked Negative Bit-lines and Charge Limited Sequential sense amplifier for wireless sensor nodes
Proceedings paper2011, 37th European solid-State Circuits Conference - ESSCIRC, 12/09/2011, p.531-534Publication A 128b organic RFID transponder chip, including Manchester encoding and ALOHA anti-collision protocol, operating with a data rate of 1529b/s
Proceedings paper2009, IEEE International Solid-State Circuits Conference - ISSCC, 8/02/2009, p.206-207Publication A 14 bit 130 MHz CMOS current-steering DAC with adjustable INL
Proceedings paper2004-09, Proceedings of the 30th European Solid-State Circuits Conference - ESSCIRC, 21/09/2004, p.167-170Publication A 24V Thin-Film Ultrasonic Driver for Haptic Feedback in Metal-Oxide Thin-Film Technology using Hybrid DLL Locking Architecture
Proceedings paper2022, 48th IEEE European Solid State Circuits Conference (ESSCIRC), SEP 19-22, 2022, p.69-72Publication A 28 nm CMOS 7.04 Gsps polar digital front-end processor for 60 GHz transmitter
; ; ; Proceedings paper2016, IEEE Asian Solid-State Circuits Conference - A-SSCC, 8/11/2016, p.333-336Publication A 2Mbit Digital in-Memory Computing Matrix-Vector Multiplier for DNN Inference supporting flexible bit precision and matrix size achieving 612 binary TOPS/W
Proceedings paper2023, IEEE 49th European Solid-State Circuits Conference (ESSCIRC), SEP 11-14, 2023, p.417-420Publication A 2T1C AMOLED display with external compensation reducing on-panel current variations to 0.079 percent
Proceedings paper2020, SID's Display Week 2020, 2/08/2020, p.547-550Publication A 3.6pJ/access 480MHz, 128Kbit on-chip SRAM with 850MHz boost mode in 90nm CMOS with tunable sense amplifiers to cope with variability.
Proceedings paper2008, 34th European Solid-State Circuits Conference - ESSCIRC, 15/09/2008, p.278-281Publication A 36V Ultrasonic Driver for Haptic Feedback Using Advanced Charge Recycling Achieving 0.20CV(2)f Power Consumption
Proceedings paper2021, 47th IEEE European Solid State Circuits Conference (ESSCIRC), SEP 06-09, 2021, p.159-162Publication A 36V Ultrasonic Driver for Haptic Feedback Using Advanced Charge Recycling Achieving 0.20CV(2)f Power Consumption
Proceedings paper2021, IEEE 51st European Solid-State Device Research Conference (ESSDERC), SEP 06-09, 2021, p.159-162Publication A 4.4 pJ/access 80 MHz, 128 kbit variability resilient SRAM with multi-sized sense amplifier redundancy
Journal article2011, IEEE Journal of Solid-State Circuits, (46) 10, p.2416-2430Publication A 4.4pJ/access 80MHz, 2K word x 64b memory with write masking feature and variability resilient multi-sized sense amplifier redundancy for wireless sensor nodes applications
Proceedings paper2010, 36th European Solid-State Circuits Conference - ESSCIRC, 14/09/2010, p.358-361Publication A 65 nm, 850 MHz, 256 kbit, 4.3 pJ/access, ultra low leakage power memory using dynamic cell stability and a dual swing data link
Journal article2012, IEEE Journal of Solid-State Circuits, (47) 7, p.1784-1796