Browsing by Author "Garcia-Ortiz, Alberto"
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Publication GNN-assisted Back-side Clock Routing Methodology for Advance Technologies
Proceedings paper2024, 61st Design Automation Conference, JUN 23-27, 2024Publication Hier-3D: A Methodology for Physical Hierarchy Exploration of 3-D ICs
Journal article2024, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, (43) 7, p.1957-1970Publication High-Performance Logic-on-Memory Monolithic 3-D IC Designs for Arm Cortex-A Processors
Journal article2021, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, (29) 6, p.1152-1163Publication MemPool-3D: Boosting Performance and Efficiency of Shared-L1 Memory Many-Core Clusters with 3D Integration
Publication Power, Performance, Area and Cost Analysis of Memory-on-Logic Face-to-Face Bonded 3D Processor Designs
Proceedings paper2021, IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), JUL 26-28, 2021Publication Power, Performance, Area, and Cost Analysis of Face-to-Face-Bonded 3-D ICs
Journal article2023, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, (13) 3, p.300-314