Browsing by Author "Hopkins, Janet"
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Publication Comparison Between Wet and Dry Silicon Via Reveal in 3D Backside Processing
Proceedings paper2015, 12th Wafer-Level Packaging Symposium, 2015-10-13Publication Extreme wafer thinning optimization for via-last applications
; ; ; ; ; Proceedings paper2016, IEEE International Conference on 3D System Integration - 3DIC, 8/11/2016, p.1-4Publication Impact of backside processing on C-V characteristics of TSV capacitors in 3D stacked IC process flows
Proceedings paper2015, 17th Electronics Packaging Technology Conference - EPTC, 2/12/2015, p.1-4