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Browsing by Author "Hyun, S."

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    A 50nm high-k poly silicon gate stack with a buried SiGe channel

    Jakschik, S.
    ;
    Hoffmann, Thomas Y.
    ;
    Cho, Hag-Ju
    ;
    Veloso, Anabela  
    ;
    Loo, Roger  
    ;
    Hyun, S.
    ;
    Sorada, H.
    Proceedings paper
    2007, International Symposium on VLSI Technology, Systems and Applications, 23/04/2007
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    Threshold voltage control in PMOSFETs with polysilicon or fully-Silicided gates on Hf-based gate dielectric using controlled lateral oxidation

    Kaushik, Vidya
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    Rohr, Erika
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    Hyun, S.
    ;
    De Gendt, Stefan  
    ;
    Van Elshocht, Sven  
    ;
    Delabie, Annelies  
    Proceedings paper
    2005, Physics and Technology if High-k Gate Dielectrics III, 16/10/2005, p.305

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