Browsing by Author "Kernstock, C."
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Publication A TCAD Compatible SONOS Trapping Layer Model for Accurate Programming Dynamics
Publication Monolithic TCAD simulation of phase-change memory (PCM/PRAM) plus Ovonic Threshold Switch (OTS) selector device
Publication Physical modeling of NBTI: from individual defects to devices
Proceedings paper2014, International Conference on Simulation of Semiconductor Processes and Devices - SISPAD, 9/09/2014, p.81-84Publication Quantitative 3-D model to explain large single trap charge variability in vertical NAND memory
Proceedings paper2019, IEEE International Electron Devices Meeting - IEDM, 7/12/2019, p.755-758Publication Reliability and Variability-Aware DTCO Flow: Demonstration of Projections to N3 FinFET and Nanosheet Technologies
Publication Understanding the ISPP Slope in Charge Trap Flash Memory and its Impact on 3-D NAND Scaling
Proceedings paper2021, IEEE International Electron Devices Meeting (IEDM), DEC 11-16, 2021