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Browsing by Author "Matsuoka, F."

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    12-EUV layer Surrounding Gate Transistor (SGT) for vertical 6-T SRAM: 5-nm-class technology for ultra-density logic devices

    Kim, Min-Soo  
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    Harada, N.
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    Kikuchi, Yoshiaki  
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    Boemmels, Juergen  
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    Mitard, Jerome  
    ;
    Huynh Bao, Trong
    Proceedings paper
    2019, 2019 Symposium on VLSI Technology, 9/06/2019, p.T15-1
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    DTCO and TCAD for a 12 layer-EUV ultra-scaled surrounding gate transistor 6T-SRAM

    Matagne, Philippe  
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    Nakamura, H.
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    Kim, Min-Soo  
    ;
    Kikuchi, Yoshiaki  
    ;
    Huynh Bao, Trong
    ;
    Tao, Zheng  
    Proceedings paper
    2018, 2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), 24/09/2018, p.45-48

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