Publication:
12-EUV layer Surrounding Gate Transistor (SGT) for vertical 6-T SRAM: 5-nm-class technology for ultra-density logic devices
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1 since deposited on 2021-10-27
Acq. date: 2026-01-06
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2092 since deposited on 2021-10-27
Acq. date: 2026-01-06
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Downloads
1 since deposited on 2021-10-27
Acq. date: 2026-01-06
Views
2092 since deposited on 2021-10-27
Acq. date: 2026-01-06
Citations