Publication:
12-EUV layer Surrounding Gate Transistor (SGT) for vertical 6-T SRAM: 5-nm-class technology for ultra-density logic devices
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1 since deposited on 2021-10-27
Acq. date: 2026-03-17
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2097 since deposited on 2021-10-27
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Acq. date: 2026-03-17
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1 since deposited on 2021-10-27
Acq. date: 2026-03-17
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2097 since deposited on 2021-10-27
3last month
Acq. date: 2026-03-17
Citations