Browsing by Author "Vos, I."
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Publication Copper CMP using a Lam teres linear planarization technology
Oral presentation2001, 6th International Chemical-Mechanical Polish (C.M.P.) Planarization for ULSI Multilevel Interconnection Conference (CMP-MIC) andPublication High Q inductor add-on module in thick Cu/SiLK/sup TM/ single damascene
Proceedings paper2001, Proceedings of the IEEE International Interconnect Technology Conference, 4/06/2001, p.107-109Publication Integration feasibility of porous SiLK semiconductor dielectric
;Waeterloos, Joost; ; ;Castillo, D. W. ;Lucero, S.Proceedings paper2001, Proceedings of the IEEE 2001 International Interconnect Technology Conference, 4/06/2001, p.253-254Publication Integration of a low permittivity spin-on embedded hardmask for Cu/SiLK resin dual damascene
;Waeterloos, Joost ;Shaffer, E. O. ;Stokich, T. ;Hetzner, J. ;Price, D. ;Booms, L.Donaton, R. A.Proceedings paper2001, Proceedings of the IEEE 2001 International Interconnect Technology Conference, 1/06/2001, p.60-62Publication Integration of Cu and low-K dielectrics: effect of hard mask and dry etch on electrical performance of damascene structures
Journal article2001, Microelectronic Engineering, (55) 1_4, p.277-283