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Browsing by Author "Zheng, T."

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    Buried metal line compatible with 3D sequential integration for top tier planar devices dynamic Vth tuning and RF shielding applications

    Vandooren, Anne  
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    Wu, Zhicheng  
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    Khaled, Ahmad  
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    Franco, Jacopo  
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    Parvais, Bertrand  
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    Li, W.
    Proceedings paper
    2019, 2019 Symposia on VLSI Technology and Circuits, 9/06/2019, p.T56-T57
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    First demonstration of 3D stacked Finfets at a 45nm fin pitch and 110nm gate pitch technology on 300mm wafers

    Vandooren, Anne  
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    Franco, Jacopo  
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    Wu, Zhicheng  
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    Parvais, Bertrand  
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    Li, Waikin  
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    Walke, Amey  
    Proceedings paper
    2018, IEEE International Electron Devices Meeting - IEDM, 1/12/2018, p.149-152
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    Sequential 3D: Key integration challenges and opportunities for advanced semiconductor scaling

    Vandooren, Anne  
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    Witters, Liesbeth  
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    Franco, Jacopo  
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    Mallik, Arindam  
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    Parvais, Bertrand  
    ;
    Wu, Z.
    Proceedings paper
    2018, International Conference on IC Design and Technology - ICICDT, 4/06/2018, p.145-148

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