Browsing by author "Guissi, Sofiane"
Now showing items 1-4 of 4
-
Backside power delivery as a scaling knob for future systems
Chava, Bharani; Shaik, Khaja Ahmad; Jourdain, Anne; Guissi, Sofiane; Weckx, Pieter; Ryckaert, Julien; Van der Plas, Geert; Spessot, Alessio; Beyne, Eric; Mocuta, Anda (2019) -
CMOS area scaling and the need for high aspect ratio vias
Briggs, Basoene; Guissi, Sofiane; Wilson, Chris; Ryckaert, Julien; Paolillo, Sara; Vandersmissen, Kevin; Versluijs, Janko; Lorant, Christophe; Heylen, Nancy; Boemmels, Juergen; Tokei, Zsolt; Sherazi, Yasser; Weckx, Pieter; Kljucar, Luka; van der Veen, Marleen; Boccardi, Guillaume; De Heyn, Vincent; Gupta, Anshul; Ervin, Joseph; Kamon, Matt (2018) -
Modeling of tone inversion process flow for N5 interconnect to characterize block tip to tip
Guissi, Sofiane; Clark, William; Juncker, Aurélie; Ervin, J.; Greiner, K.; Fried, D.; Briggs, Basoene; Devriendt, Katia; Sebaai, Farid; Charley, Anne-Laure; Wilson, Chris; Boemmels, Juergen; Tokei, Zsolt (2017) -
N7 FinFET self-aligned quadruple patterning modeling
Baudot, Sylvain; Guissi, Sofiane; Milenin, Alexey; Ervin, Joe; Schram, Tom (2018)