Browsing by author "Duffy, R."
Now showing items 1-4 of 4
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CMOS scaling beyond the 90 nm CMOS technology node: shallow junction and integration challenges
Dachs, Charles; Surdeanu, Radu; Pawlak, Bartek; Doornbos, Gerben; Duffy, R.; Heringa, Anco; Ponomarev, Youri; Venezia, Vincent; Van Dal, Mark; Stolk, P.; Lindsay, Richard; Henson, Kirklen; Dieu, B.; Geenen, Luc; Hoflijk, Ilse; Richard, Olivier; Clarysse, Trudo; Brijs, Bert; Vandervorst, Wilfried; Pagès, Xavier (2003) -
Conformal doping for FINFET's: a fabrication and metrology challenge
Vandervorst, Wilfried; Everaert, Jean-Luc; Rosseel, Erik; Jurczak, Gosia; Hoffmann, Thomas Y.; Eyben, Pierre; Mody, Jay; Koelling, Sebastian; Gilbert, Matthieu; Pawlak, Bartek; Duffy, R.; Van Dal, Mark (2008) -
Junction architecture for planar devices
Pawlak, Bartek; Duffy, R.; Hoffmann, Thomas Y.; Severi, Simone; Felch, S.B.; Eyben, Pierre; Van Daele, Benny; Vandervorst, Wilfried; Lander, Rob (2007) -
Quantitative prediction of junction leakage in bulk-technology CMOS devices
Duffy, R.; Heringa, A.; Venezia, V.C.; Loo, Josine; Verheijen, M.A.; Hopstaken, M.J.P.; van der Tak, K.; de Potter de ten Broeck, Muriel; Hooker, J.C.; Meunier-Beillard, P.; Delhougne, R. (2010)